2.P — Worked Problems: Devices and Analog Circuits

Sixteen problems across doping, junctions, rectifiers, transistors, MOSFETs, op-amps and timers.

Problem 1 — Doping and carrier concentrations

Silicon at 300 K is doped with 2\times10^{16} phosphorus atoms per cm³. Find the electron and hole concentrations, and the resistivity. Take n_i = 1.5\times10^{10}\ \text{cm}^{-3}, \mu_n = 1350, $\mu_p = 480\ \text{cm}^2/\text{V}\cdot$s.

Solution

Phosphorus is group V, so it is a donor and every atom gives one free electron:

n \approx N_D = 2\times10^{16}\ \text{cm}^{-3}

Holes from the mass action law:

p = \frac{n_i^2}{n} = \frac{(1.5\times10^{10})^2}{2\times10^{16}} = \frac{2.25\times10^{20}}{2\times10^{16}} = 1.125\times10^4\ \text{cm}^{-3}

Electrons outnumber holes by a factor of 1.8\times10^{12}. The hole contribution to conduction is completely negligible:

\sigma = q(n\mu_n + p\mu_p) \approx qn\mu_n = 1.602\times10^{-19}\times2\times10^{16}\times1350 = 4.33\ (\Omega\cdot\text{cm})^{-1}

\rho = \frac{1}{4.33} = 0.231\ \Omega\cdot\text{cm}

Compare with intrinsic silicon, whose resistivity is about $2.3\times10^5\ \Omega\cdot$cm. Doping one atom in 2.5 million dropped the resistivity by a factor of a million. That is the whole reason the semiconductor industry exists.

Problem 2 — Built-in potential

A silicon junction has N_A = 10^{17} and N_D = 10^{15}\ \text{cm}^{-3}. Find V_{bi} at 300 K, then at 100 °C, where n_i has grown to 8.5\times10^{12}.

Solution

At 300 K:

V_{bi} = V_T\ln\frac{N_AN_D}{n_i^2} = 0.0259\ln\frac{10^{17}\times10^{15}}{(1.5\times10^{10})^2} = 0.0259\ln\frac{10^{32}}{2.25\times10^{20}}

= 0.0259\ln(4.44\times10^{11}) = 0.0259\times26.82 = 0.695\ \text{V}

At 373 K, V_T = 0.0259\times373/300 = 0.0322 V:

V_{bi} = 0.0322\ln\frac{10^{32}}{(8.5\times10^{12})^2} = 0.0322\ln\frac{10^{32}}{7.2\times10^{25}} = 0.0322\ln(1.39\times10^6)

= 0.0322\times14.14 = 0.455\ \text{V}

The barrier fell by 240 mV over 73 °C, about 3.3 mV per degree. The commonly quoted figure for the forward drop at constant current is -2 mV/°C, slightly less because the current term partly compensates. Either way, junctions get easier to turn on as they heat, which is precisely the mechanism of thermal runaway in Chapter 2.3.

Problem 3 — Diode current from the exponential

A diode has I_S = 10^{-14} A and n = 1. Find the current at 0.6 V and at 0.7 V, and confirm the 60 mV per decade rule.

Solution

I(0.6) = 10^{-14}\left(e^{0.6/0.0259}-1\right) = 10^{-14}\times e^{23.17} = 10^{-14}\times1.156\times10^{10} = 1.16\times10^{-4}\ \text{A}

which is 0.116 mA.

I(0.7) = 10^{-14}\times e^{27.03} = 10^{-14}\times5.48\times10^{11} = 5.48\times10^{-3}\ \text{A} = 5.48\ \text{mA}

Ratio: 5.48/0.116 = 47, for 100 mV of extra voltage.

Check the rule: a decade needs V_T\ln10 = 0.0259\times2.303 = 59.6 mV, so 100 mV should give 10^{100/59.6} = 10^{1.678} = 47.6 ✓.

What this means practically. Going from 0.1 mA to 5 mA — a factor of fifty — cost only 100 mV. That is why "0.7 V" is a serviceable model across the whole range of ordinary operation.

Problem 4 — Design a full-wave supply

Design a 12 V DC supply delivering 500 mA from 230 V, 50 Hz mains, using a bridge rectifier, a smoothing capacitor and a linear regulator that needs at least 2 V of headroom. Find the transformer secondary voltage, the capacitor, and the regulator's dissipation.

Solution

Step 1 — work backwards from the regulator. It needs at least 12+2 = 14 V at the bottom of the ripple.

Step 2 — choose ripple. Allow 2 V peak-to-peak, so the peak must be 14+2 = 16 V.

Step 3 — add the bridge drop. Two diodes conduct at a time:

V_{peak(secondary)} = 16+1.4 = 17.4\ \text{V}

V_{rms(secondary)} = \frac{17.4}{\sqrt2} = 12.3\ \text{V}

A 12 V transformer, which is a standard part. Mains variation of ±10% must be checked: at -10\% the peak becomes 15.7 V and the ripple bottom 13.7 V, marginally under the 14 V needed — so specify a 15 V transformer for safety, and the sums repeat comfortably.

Step 4 — capacitor.

C = \frac{I}{2fV_{ripple}} = \frac{0.5}{2\times50\times2} = 2500\ \mu\text{F} \;\to\; \text{use } 3300\ \mu\text{F}

Voltage rating at least 1.5\times the peak, so 35 V.

Step 5 — regulator dissipation. With a 15 V transformer the peak is about 19.8 V, and the average across the ripple is roughly 19 V:

P = (19-12)\times0.5 = 3.5\ \text{W}

That needs a heatsink. A TO-220 package in free air handles about 2 W; with a modest heatsink of 10 °C/W it manages this comfortably.

What to notice. The regulator wastes 3.5 W to deliver 6 W — 63% efficiency at best, and worse at low mains. This is the entire argument for switching regulators, and it is why a linear bench supply is heavy and hot while a phone charger of the same rating fits in a plug.

Problem 5 — Zener regulator with the no-load check

Design a 6.2 V reference from a supply that varies 10 to 14 V, driving a load of 0 to 30 mA. The Zener needs at least 3 mA. Find R_S and the required Zener power rating.

Solution

Worst case for the resistor: minimum input, maximum load.

R_S \le \frac{10-6.2}{0.030+0.003} = \frac{3.8}{0.033} = 115\ \Omega

Use 100 Ω, giving margin.

Verify the minimum Zener current at that value with V_{in} = 10 V and I_L = 30 mA:

I_{total} = \frac{10-6.2}{100} = 38\ \text{mA}, \qquad I_Z = 38-30 = 8\ \text{mA} \ ✓

Now the dangerous case: maximum input, no load.

I_Z = \frac{14-6.2}{100} = 78\ \text{mA}, \qquad P_Z = 6.2\times0.078 = 0.48\ \text{W}

A 1 W Zener is required. A 400 mW part would run at 120% of rating and fail.

Resistor power too: I^2R = 0.078^2\times100 = 0.61 W, so a 1 W resistor.

Efficiency check: at best the circuit delivers 6.2\times0.03 = 0.19 W while dissipating up to 1.1 W. Fine for a reference, hopeless for power.

Problem 6 — Transistor switch design

Drive a 24 V solenoid drawing 250 mA from a 5 V logic output. Available transistor has \beta_{min} = 40 at that current and V_{CE(sat)} = 0.3 V. Design it fully.

Solution

Base current needed:

I_{B(min)} = \frac{0.25}{40} = 6.25\ \text{mA}

Overdrive by 5 for guaranteed saturation:

I_B = 31\ \text{mA}

That is too much for a typical logic pin (20 mA limit). Two options: use a Darlington, or overdrive by only 3, giving 19 mA — still marginal.

Better: use a Darlington pair or a logic-level MOSFET. Take the Darlington with \beta = 1000:

I_{B(min)} = \frac{0.25}{1000} = 0.25\ \text{mA}, \quad\text{overdrive}\times5 = 1.25\ \text{mA}

R_B = \frac{5-1.4}{0.00125} = 2880\ \Omega \;\to\; 2.7\ \text{k}\Omega

(1.4 V because a Darlington has two base-emitter junctions in series.)

Dissipation: V_{CE(sat)} \approx 0.9 V for a Darlington, so P = 0.9\times0.25 = 225 mW. Acceptable without a heatsink in a small package, warm to the touch.

Flyback diode: the solenoid stores \tfrac12LI^2; with L = 100 mH that is 3.1 mJ, and without a diode the switch-off spike would be in the kilovolts. Fit a 1N4007 across the coil, cathode to +24 V. Its rating must exceed the 250 mA the coil will dump into it, which it does easily.

A pull-down resistor of 10 kΩ from base to ground stops the transistor turning on from stray coupling while the logic output is in a high-impedance state during reset.

Problem 7 — Complete common-emitter bias design

Design a common-emitter amplifier: V_{CC} = 15 V, I_C = 1.5 mA, \beta between 80 and 250. Find all four resistors, then verify the Q-point at both extremes of \beta.

Solution

Allocate voltages. V_E = 1.5 V (10% of supply), V_{CE} = 7 V, leaving 15-1.5-7 = 6.5 V across R_C.

R_E = \frac{1.5}{1.5\ \text{mA}} = 1\ \text{k}\Omega

R_C = \frac{6.5}{1.5\ \text{mA}} = 4.33\ \text{k}\Omega \;\to\; 4.3\ \text{k}\Omega

V_B = 1.5+0.7 = 2.2\ \text{V}

Divider. Worst case base current is at \beta_{min} = 80: $I_B = 1.5/80 = 18.8\ \mu$A. Make the divider carry ten times that, 188 µA:

R_2 = \frac{2.2}{188\ \mu\text{A}} = 11.7\ \text{k}\Omega \;\to\; 12\ \text{k}\Omega

R_1 = \frac{15-2.2}{188\ \mu\text{A}} = 68\ \text{k}\Omega \;\to\; 68\ \text{k}\Omega

Verify with \beta = 250. Thevenin the divider: V_{Th} = 15\times12/80 = 2.25 V, R_{Th} = 68\|12 = 10.2 kΩ.

I_E = \frac{V_{Th}-0.7}{R_E + R_{Th}/(\beta+1)} = \frac{1.55}{1000+10200/251} = \frac{1.55}{1040.6} = 1.49\ \text{mA}

Verify with \beta = 80:

I_E = \frac{1.55}{1000+10200/81} = \frac{1.55}{1126} = 1.38\ \text{mA}

A threefold change in \beta moved I_C by 7%. That is what the emitter resistor bought.

Gain with R_E bypassed: r_e = 26/1.45 = 17.9\ \Omega, so A_v = -4300/17.9 = -240.

Gain unbypassed: A_v = -4300/(17.9+1000) = -4.2. Stable, linear, and far more useful in most designs.

Problem 8 — Emitter follower impedances

An emitter follower has R_E = 2.2 kΩ, \beta = 150, I_E = 5 mA, driven from a source of 47 kΩ. Find the input impedance, the output impedance and the voltage gain.

Solution

r_e = \frac{26\ \text{mV}}{5\ \text{mA}} = 5.2\ \Omega

R_{in} = \beta(r_e+R_E) = 150\times2205 = 331\ \text{k}\Omega

R_{out} = r_e + \frac{R_{source}}{\beta} = 5.2 + \frac{47{,}000}{150} = 5.2+313 = 318\ \Omega

A_v = \frac{R_E}{r_e+R_E} = \frac{2200}{2205} = 0.998

What was achieved. The source sees 331 kΩ instead of whatever load follows, and the load sees 318 Ω instead of 47 kΩ. The impedance was transformed by a factor of about 150 in each direction, at the cost of nothing but 0.2% of the signal.

Drive a 1 kΩ load directly from the 47 kΩ source and you would get 1000/48000 = 2\% of the signal. Through the follower you get 1000/1318 = 76\%. That is a factor of 36 improvement from one transistor.

Problem 9 — MOSFET conduction and switching loss

A MOSFET with R_{DS(on)} = 12\ \text{m}\Omega and Q_G = 30 nC switches 15 A at 100 kHz, with 40 V across it when off. Switching transitions take 60 ns each. Find the total loss and the gate drive current needed.

Solution

Conduction loss, assuming 50% duty:

P_{cond} = I^2R_{DS(on)}\times D = 15^2\times0.012\times0.5 = 225\times0.012\times0.5 = 1.35\ \text{W}

Switching loss. During each transition, voltage and current overlap; approximating the overlap as a triangle gives an average of \tfrac12VI over the transition:

P_{sw} = \tfrac12 V I (t_{on}+t_{off})f = 0.5\times40\times15\times120\times10^{-9}\times10^5

= 0.5\times40\times15\times0.012 = 3.6\ \text{W}

Total: 4.95 W, and switching loss dominates, which is the usual situation above about 50 kHz.

Gate drive current:

I_G = \frac{Q_G}{t} = \frac{30\times10^{-9}}{60\times10^{-9}} = 0.5\ \text{A}

Gate drive power: Q_GV_{GS}f = 30\times10^{-9}\times12\times10^5 = 36 mW — trivial in energy, but it needs half an amp of peak current, which no microcontroller pin can supply.

Design conclusion. Halving the switching time to 30 ns halves the 3.6 W to 1.8 W but doubles the gate current to 1 A. The gate driver is what buys you efficiency, and this trade is the central design decision in every switching converter.

Problem 10 — Op-amp gain stage design

Design an amplifier with a gain of -47 and an input impedance of at least 10 kΩ, using an op-amp with GBW = 3 MHz. What is the resulting bandwidth? Rework it as two stages and compare.

Solution

Single stage. Input impedance for an inverting amplifier is R_1, so R_1 = 10 kΩ:

R_f = 47\times10\ \text{k}\Omega = 470\ \text{k}\Omega

Both are standard values.

Bandwidth. For an inverting stage the noise gain is 1+R_f/R_1 = 48:

\text{BW} = \frac{3\times10^6}{48} = 62.5\ \text{kHz}

Two stages. Split the gain: \sqrt{47} = 6.86, so use -6.8 and -6.9 giving 46.9 total.

Stage 1: R_1 = 10 kΩ, R_f = 68 kΩ. Noise gain 7.8, bandwidth 385 kHz. Stage 2: R_1 = 10 kΩ, R_f = 69 kΩ (use 68 k, total gain 46.2). Same bandwidth.

Two cascaded stages each of bandwidth f_1 give a combined bandwidth of f_1\sqrt{2^{1/2}-1} = 0.64f_1:

\text{BW}_{total} = 0.64\times385 = 246\ \text{kHz}

Four times the bandwidth for one extra op-amp, and the output is non-inverted since two inversions cancel.

Also check slew rate. For a 5 V output amplitude at 246 kHz:

\text{SR}_{needed} = 2\pi\times246{,}000\times5 = 7.7\ \text{V}/\mu\text{s}

A 741 (0.5 V/µs) would slew-limit badly; you need a part rated at 10 V/µs or better. Bandwidth and slew rate are separate specifications and both must be checked.

Problem 11 — Instrumentation amplifier for a bridge

A strain gauge bridge excited at 5 V produces ±10 mV of differential output riding on a 2.5 V common-mode level. Amplify it to ±2.5 V for a single-supply ADC centred at 2.5 V. Find the gain and the CMRR needed for 0.1% accuracy.

Solution

Gain:

A = \frac{2.5\ \text{V}}{10\ \text{mV}} = 250

CMRR requirement. The common-mode signal is 2.5 V. For the error it causes at the output to be under 0.1% of the 2.5 V full scale, that is 2.5 mV at the output, or $2.5/250 = 10\ \mu$V referred to the input.

\text{CMRR} = \frac{2.5\ \text{V}}{10\ \mu\text{V}} = 250{,}000 = 108\ \text{dB}

A plain difference amplifier cannot do this. With 0.1% resistors its CMRR is limited to about

\text{CMRR} \approx \frac{1+R_f/R_1}{4\times0.001} = \frac{251}{0.004} = 62{,}750 = 96\ \text{dB}

which is 12 dB short. An instrumentation amplifier is required, and a monolithic part with laser-trimmed resistors reaches 110 to 120 dB comfortably.

Also check offset. A 250× gain multiplies input offset by 250. To keep offset error below 2.5 mV at the output, input offset must be under 10 µV — so a precision or chopper amplifier, not a general-purpose one. This is the calculation that decides which chip you can afford to use.

Problem 12 — Integrator design

Design an integrator that produces a 10 V output ramp in 100 ms from a 1 V input. Choose components and add the DC stabilisation.

Solution

V_{out} = -\frac{1}{RC}\int V_{in}dt = -\frac{V_{in}t}{RC}

10 = \frac{1\times0.1}{RC} \;\Rightarrow\; RC = 0.01\ \text{s}

Choose C = 100 nF, then R = 100 kΩ. Both standard.

DC stabilisation. Put R_F across the capacitor to limit the DC gain. Choose R_F = 10R = 1 MΩ, giving a DC gain of -10 and a corner frequency of

f = \frac{1}{2\pi R_FC} = \frac{1}{2\pi\times10^6\times10^{-7}} = 1.59\ \text{Hz}

Integration is honest above about 16 Hz (ten times the corner) and degenerates into plain amplification below it.

Check the offset drift without R_F. With V_{OS} = 2 mV, the output would ramp at V_{OS}/RC = 0.002/0.01 = 0.2 V/s, hitting the rail in about a minute. With R_F fitted, the offset error settles at 10\times2\ \text{mV} = 20 mV and stays there. That is the whole reason the resistor is compulsory.

Problem 13 — Schmitt trigger with hysteresis

Design a Schmitt trigger with thresholds at 2 V and 3 V from a comparator running on a single 5 V supply, using a reference of 2.5 V.

Solution

Hysteresis is 1 V, centred on 2.5 V. With a comparator whose output swings 0 to 5 V, positive feedback resistor R_2 from output to the non-inverting input, and R_1 from the reference:

The non-inverting input sits at a weighted average of the reference and the output:

V_+ = \frac{V_{ref}R_2 + V_{out}R_1}{R_1+R_2}

With output high (5 V):

V_{UT} = \frac{2.5R_2+5R_1}{R_1+R_2}

With output low (0 V):

V_{LT} = \frac{2.5R_2}{R_1+R_2}

Subtracting:

V_{UT}-V_{LT} = \frac{5R_1}{R_1+R_2} = 1\ \text{V} \;\Rightarrow\; \frac{R_1}{R_1+R_2} = 0.2 \;\Rightarrow\; R_2 = 4R_1

Choose R_1 = 10 kΩ, R_2 = 40 kΩ (use 39 kΩ).

Verify with 39 kΩ: R_1/(R_1+R_2) = 10/49 = 0.204.

V_{LT} = 2.5\times\frac{39}{49} = 1.99\ \text{V}, \qquad V_{UT} = \frac{2.5\times39+5\times10}{49} = \frac{97.5+50}{49} = 3.01\ \text{V}

Thresholds at 1.99 V and 3.01 V ✓.

What it buys. A signal with 500 mV of noise crossing 2.5 V slowly would produce dozens of output transitions without hysteresis. With a 1 V gap, it produces exactly one.

Problem 14 — 555 astable design

Design a 555 astable producing 1 kHz at as close to 50% duty as possible without a diode, then with a diode.

Solution

Without a diode. Duty is (R_1+R_2)/(R_1+2R_2), which approaches 50% as R_1 becomes small relative to R_2. Practical minimum for R_1 is about 1 kΩ, since the discharge transistor must sink V_{CC}/R_1.

Take R_1 = 1 kΩ, and solve for R_2 at 1 kHz:

f = \frac{1.44}{(R_1+2R_2)C} \;\Rightarrow\; (R_1+2R_2)C = 1.44\times10^{-3}

Choose C = 10 nF:

R_1+2R_2 = \frac{1.44\times10^{-3}}{10^{-8}} = 144{,}000

R_2 = \frac{144{,}000-1000}{2} = 71.5\ \text{k}\Omega \;\to\; 68\ \text{k}\Omega

Check: f = 1.44/((1000+136{,}000)\times10^{-8}) = 1.44/(1.37\times10^{-3}) = 1051 Hz. Duty = 69/137 = 50.4\% ✓.

With a diode across R_2, charging bypasses R_2 entirely:

t_{high} = 0.693R_1C, \qquad t_{low} = 0.693R_2C

Exactly 50% needs R_1 = R_2. For 1 kHz:

0.693(R_1+R_2)C = 10^{-3}, \quad R_1=R_2=R: \quad 1.386RC = 10^{-3}

With C = 10 nF: R = 72.2 kΩ, so use 68 kΩ giving 1061 Hz at exactly 50%.

Note the diode's own 0.7 V drop slightly shortens the charge path's effective voltage, so real duty lands near 48% rather than 50%. That is close enough for most uses and the reason precision square waves come from a divide-by-two after a doubled-frequency oscillator instead.

Problem 15 — Wien bridge oscillator

Design a 2 kHz Wien bridge oscillator and specify the amplitude stabilisation.

Solution

f_0 = \frac{1}{2\pi RC} \;\Rightarrow\; RC = \frac{1}{2\pi\times2000} = 7.96\times10^{-5}

Choose C = 10 nF, then R = 7.96 kΩ, so use 8.2 kΩ giving 1941 Hz — or 7.5 kΩ with a small trimmer.

Amplifier gain must be exactly 3. Non-inverting: 1+R_f/R_1 = 3, so R_f = 2R_1. Take R_1 = 10 kΩ, R_f = 20 kΩ.

Stabilisation. If the gain is exactly 3 it never starts; if it is 3.1 it grows until it clips. The classic fix: make R_1 a small incandescent lamp whose cold resistance is below 10 kΩ. At startup the gain exceeds 3, the amplitude grows, the lamp heats, its resistance rises, and the gain falls back to 3.

Modern fix: two anti-parallel diodes across part of R_f. Below about 0.6 V of feedback signal they do nothing and the gain is above 3; above that they conduct and shunt R_f, dropping the gain. Simple and cheap, at the cost of a percent or so of distortion.

Startup check: thermal noise across a 10 kΩ resistor over a 2 kHz bandwidth is roughly $\sqrt{4kTRB} = \sqrt{4\times1.38\times10^{-23}\times300\times10^4\times2000} = 0.57\ \mu$V. With a loop gain of 1.05 per cycle, growth from 0.57 µV to 5 V takes \ln(5/5.7\times10^{-7})/\ln(1.05) = 16.1/0.0488 = 330 cycles, which at 2 kHz is 165 ms. That is why an oscillator takes a fraction of a second to reach full amplitude.

Problem 16 — Choose a device for a job

You must switch a 400 V, 30 A load at 20 kHz in a motor drive. Compare a silicon MOSFET, an IGBT and a silicon carbide MOSFET, with the numbers.

Solution

Take representative parts:

	Si MOSFET (500 V)	IGBT (600 V)	SiC MOSFET (650 V)
On-state	R_{DS(on)} = 0.2 Ω	V_{CE(sat)} = 1.8 V	R_{DS(on)} = 0.04 Ω
Switching energy	300 µJ	1200 µJ	120 µJ

Conduction loss at 30 A, 50% duty:

• Si MOSFET: 30^2\times0.2\times0.5 = 90 W. Unusable.
• IGBT: 1.8\times30\times0.5 = 27 W.
• SiC MOSFET: 30^2\times0.04\times0.5 = 18 W.

Switching loss at 20 kHz:

• Si MOSFET: 300\ \mu\text{J}\times20{,}000 = 6 W.
• IGBT: 1200\ \mu\text{J}\times20{,}000 = 24 W.
• SiC: 120\ \mu\text{J}\times20{,}000 = 2.4 W.

Totals: 96 W, 51 W, 20.4 W.

The reasoning. Silicon MOSFETs are ruled out because R_{DS(on)} rises steeply with voltage rating — roughly as V^{2.5} — so a 500 V silicon MOSFET is inherently resistive. The IGBT works and is cheap, and its fixed 1.8 V drop scales linearly with current rather than quadratically, which is why it wins at very high currents. SiC wins outright on loss because its wider band gap allows a thinner, lower-resistance drift region at the same voltage rating.

But raise the frequency to 100 kHz and the picture sharpens: IGBT switching loss becomes 120 W and it is eliminated entirely, while SiC reaches 12 W of switching plus 18 W of conduction. That is why the industry moved to SiC as switching frequencies rose — higher frequency means smaller magnetics, and only a fast device can exploit it.

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Part 3 restricts every voltage to two values and builds arithmetic, memory and machines out of the restriction.