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3.5 — ADC and DAC: Where Digital Meets the Real World
Everything real is analog. A microphone produces a continuously varying voltage; a temperature sensor produces a slowly drifting one; a headphone needs a continuously varying current to move its coil. Digital circuits handle only discrete numbers.
So at both edges of every digital system sits a converter, and the quality of that converter is usually what actually limits the system. A 24-bit audio interface with a poor analog front end sounds worse than a 16-bit one with a good one, and the reasons are all in this chapter.
1. Digital to analog, first
Converting a number to a voltage is the easier direction, and it is also a building block inside most ADCs, so it comes first.
The weighted-resistor DAC
Take the summing amplifier from Chapter 2.5 and weight the input resistors in powers of two. Bit 3 goes through R, bit 2 through 2R, bit 1 through 4R, bit 0 through 8R. Each bit contributes current in proportion to its binary weight:
V_{out} = -V_{ref}\,R_f\left(\frac{b_3}{R}+\frac{b_2}{2R}+\frac{b_1}{4R}+\frac{b_0}{8R}\right)
Simple and unbuildable past about six bits. For 12 bits the largest resistor is 2048 times the smallest, and for the most significant bit to be accurate to half a least-significant-bit, its resistor must be accurate to one part in 4096 — 0.024%. Making a 1 kΩ and a 2.048 MΩ resistor that match each other to that precision, and keep matching over temperature, is not practical.
The R-2R ladder
The fix uses only two resistor values, R and 2R, repeated.
Analyse it from the far end. The last 2R to ground sits in parallel with the next 2R, giving R; that is in series with the ladder's R, giving 2R; which is in parallel with the next 2R, giving R again. The pattern repeats identically at every rung, so looking into the ladder from any node you always see the same impedance — and each bit's contribution is exactly half the one above it.
V_{out} = V_{ref}\sum_{i=0}^{n-1}\frac{b_i}{2^{n-i}}
Why this wins: matching two resistor values is a solved problem in integrated circuits. You lay down identical unit resistors side by side, made in the same process step, at the same temperature, and use two in series for the 2R arms. Matching to 0.01% between neighbours is routine; matching absolute values to 0.01% is not. The R-2R ladder converts an impossible absolute-accuracy problem into an easy relative-matching one. That principle — depend on ratios, never on absolute values — runs through all of integrated circuit design.
Other DAC architectures
Segmented / thermometer. For the top few bits, use 2^k-1 identical current sources and switch on however many are needed. Guarantees monotonicity — the output never goes down when the code goes up — which matters enormously in a control loop where a non-monotonic converter can make a feedback system oscillate. Uses many more elements, so only the top bits are done this way and the rest with an R-2R ladder.
Sigma-delta. Runs at a very high rate with only one bit of resolution, and uses feedback to push the quantisation error out of the audio band, then filters it away. Section 6 explains the trick. This is what is inside essentially every audio DAC.
PWM as a poor man's DAC. A microcontroller pin switched on and off rapidly, with the duty cycle setting the average, then filtered by an RC. Costs one pin and two components. Resolution is set by the timer's bit depth, but the filter must remove the switching frequency while passing the signal, so bandwidth and ripple trade directly against each other. Perfectly good for an LED brightness or a motor speed; not for audio.
2. Quantisation — what is lost, exactly
An n-bit converter has 2^n output levels. The gap between adjacent levels is the least significant bit size:
\text{LSB} = \frac{V_{FS}}{2^n}
Worked example. A 12-bit converter with a 3.3 V full-scale range:
\text{LSB} = \frac{3.3}{4096} = 0.806\ \text{mV}
Any input is rounded to the nearest level, so the error is at most half an LSB, or 403 µV here.
That rounding error is a signal in its own right. Assuming it is uniformly distributed over \pm\text{LSB}/2, its root-mean-square value is
e_{rms} = \frac{\text{LSB}}{\sqrt{12}}
Where the \sqrt{12} comes from: the variance of a uniform distribution over a width w is w^2/12, so the standard deviation is w/\sqrt{12}. This is a standard result from Volume II, Chapter 7.4.
A full-scale sine has an rms value of V_{FS}/(2\sqrt2), so the best possible signal-to-noise ratio is
\text{SNR} = \frac{V_{FS}/2\sqrt2}{\text{LSB}/\sqrt{12}} = \frac{2^n\sqrt{12}}{2\sqrt2} = 2^n\sqrt{1.5}
In decibels:
\boxed{\text{SNR}_{dB} = 6.02n + 1.76}
Every extra bit buys 6 dB. That number is worth memorising, because it converts a resolution requirement into a bit count instantly.
| Bits | Levels | Best SNR |
|---|---|---|
| 8 | 256 | 50 dB |
| 12 | 4,096 | 74 dB |
| 16 | 65,536 | 98 dB |
| 24 | 16,777,216 | 146 dB |
The 24-bit row is a lie in practice. 146 dB of dynamic range on a 2 V range means resolving 100 nanovolts, and the thermal noise of a 1 kΩ resistor over 20 kHz is already about 570 nV. No 24-bit converter achieves 24 bits of real performance; the honest figure is quoted as effective number of bits, and 20 to 21 is excellent. The extra bits are still useful, because they keep the quantisation error below the analog noise floor rather than adding to it.
Dither, which sounds like nonsense and is not
Quantisation error is only "noise" if it is random. For a signal that is small and correlated with the sampling — a quiet fade-out, a slow ramp — the error becomes a pattern, and patterns are audible as distortion in a way that hiss is not.
Adding a tiny amount of deliberate random noise, less than one LSB, before quantising breaks the correlation. The result measures slightly worse and sounds distinctly better, because the ear tolerates broadband noise far more readily than harmonic distortion. Every mastering engineer applies dither when reducing bit depth, and the reasoning is exactly this.
3. Analog to digital — the four architectures
Flash
2^n-1 comparators, each with its own reference from a resistor chain, all fired at once. A priority encoder (Chapter 3.2) turns the resulting thermometer pattern into a binary number.
One clock cycle. Nothing is faster. And nothing is more expensive: an 8-bit flash converter needs 255 comparators, and every extra bit doubles that. Ten bits would need 1023.
Used where speed is everything and 6 to 8 bits suffices: oscilloscopes, radar, high-speed serial link receivers.
Successive approximation
A binary search, in hardware. A DAC, a comparator, and a register.
- Set the most significant bit, clear the rest. Compare the DAC output with the input.
- If the DAC is too high, clear that bit; otherwise keep it.
- Move to the next bit down and repeat.
n comparisons for n bits. A 12-bit conversion takes 12 clocks — perhaps a microsecond — using one comparator and one DAC.
This is the workhorse. Every microcontroller's built-in ADC is successive approximation, at 10 to 12 bits and hundreds of kilosamples per second, and it hits the sweet spot of resolution, speed, area and power that suits almost every embedded measurement.
It needs a sample-and-hold. The input must not move during the twelve comparisons, or later bits would be decided against a different value than earlier ones. A capacitor charged through a switch holds the value; the switch opens and the conversion proceeds against a frozen input. Section 5 has more.
Integrating (dual-slope)
Charge a capacitor from the input for a fixed time, then discharge it from a known reference and count how long that takes. The ratio of the two times is the ratio of the voltages.
\frac{V_{in}}{V_{ref}} = \frac{t_{discharge}}{t_{charge}}
Two elegant properties fall out. First, the capacitor and the clock frequency appear in both phases and cancel exactly, so their absolute values do not matter — only the reference does. Accuracy from components that are not accurate.
Second, integrating over a fixed time averages away noise, and if you choose the integration time to be an exact multiple of the mains period, mains hum is averaged to precisely zero. That is why bench multimeters offer 50 Hz and 60 Hz settings, and why a good multimeter takes about 300 ms per reading.
Slow, extremely accurate, superb noise rejection. Every 6½-digit multimeter uses it.
Sigma-delta
The clever one, and worth understanding properly because it dominates audio and precision measurement. Section 6.
4. Sampling, aliasing and the anti-alias filter
Converting a continuous signal into a sequence of numbers requires taking samples at intervals, and there is a hard limit on what that can capture.
The Nyquist-Shannon sampling theorem: a signal containing no frequency above f_{max} is completely determined by samples taken at any rate above 2f_{max}. Chapter 4.7 proves it. Here, what matters is what happens when the rule is broken.
Sample a 30 kHz sine at 40 kHz and the samples are indistinguishable from those of a 10 kHz sine. The high frequency has been folded down and now masquerades as a low one. That is aliasing, and once it has happened, no amount of processing can undo it — the information is genuinely gone and a false signal is in its place.
f_{alias} = |f_{signal} - k\cdot f_{sample}|
for whichever integer k brings it into the range 0 to f_s/2.
You see this constantly in daily life. Wagon wheels turning backwards in films, because 24 frames per second undersamples the spokes. A helicopter's rotor apparently frozen on a phone video. A striped shirt shimmering on television.
The anti-alias filter is not optional
A low-pass filter must sit before the sampler, removing everything above f_s/2, because once the samples exist the damage is permanent.
That is a demanding filter. To pass 20 kHz and stop 22.05 kHz (for 44.1 kHz sampling), an analog filter needs an extremely steep transition — eight poles or more — and such filters have poor phase behaviour and expensive components.
The universal modern solution is oversampling. Sample at 128 times the rate, so the analog filter only has to stop things above 2.8 MHz, which a gentle two-pole filter does easily. Then filter digitally, where a steep response costs nothing but arithmetic, and discard the surplus samples. The hard filtering has been moved from analog, where it is expensive, into digital, where it is cheap. Chapter 5.2 builds those digital filters.
5. The specifications that decide whether a converter is good
Resolution is only the headline. These matter more.
Sample rate — conversions per second. Must exceed twice the highest frequency of interest, and comfortably more in practice.
Integral non-linearity (INL) — how far the whole transfer curve bends away from a straight line, in LSBs. This is the accuracy of a measurement.
Differential non-linearity (DNL) — how much each individual step differs from an ideal one LSB. If DNL is worse than -1 LSB, a code is missing entirely — the output jumps over it and that value can never appear. In a control loop, a missing code is a discontinuity that can cause oscillation.
Offset and gain error — the curve starts in the wrong place or has the wrong slope. Both are correctable in software with a two-point calibration, which is why they matter far less than INL and DNL.
SINAD and ENOB. Signal to noise-and-distortion, measured with a real sine input, converted to an effective bit count:
\text{ENOB} = \frac{\text{SINAD}_{dB}-1.76}{6.02}
This is the number to trust. A converter advertised as 16-bit with an ENOB of 13.2 is a 13-bit converter with three bits of marketing.
Aperture jitter. The sampling instant is never exactly where it should be, and for a fast-moving signal a timing error becomes an amplitude error:
\Delta V = \frac{dV}{dt}\cdot\Delta t = 2\pi fA\,\Delta t
Setting the resulting error below half an LSB gives the requirement:
t_{jitter} \lt \frac{1}{2\pi f\,2^n}
Worked example — 16 bits at 20 kHz:
t_j \lt \frac{1}{2\pi\times20{,}000\times65{,}536} = 1.2\times10^{-10} = 121\ \text{ps}
And at 100 MHz for 12 bits: t_j \lt 1/(2\pi\times10^8\times4096) = 0.39 ps. Sub-picosecond clock stability, which is why high-speed converters need a dedicated low-jitter clock source and why routing a converter's clock next to a digital bus ruins its performance. This is one of the most common reasons a high-resolution design underperforms its data sheet.
6. Sigma-delta, explained properly
The architecture behind almost all audio and precision conversion, and its trick is genuinely surprising: use a one-bit converter, and get twenty bits out.
Step 1: oversample
Sample far faster than Nyquist requires — 64 or 256 times. Quantisation noise power is fixed by the LSB size, but oversampling spreads that fixed power over a much wider frequency band. The portion landing in the band you care about falls in proportion:
\text{SNR gain} = 10\log_{10}(\text{OSR})\ \text{dB}
Every quadrupling of the rate gains 6 dB, which is one bit. Useful, but slow going — 256× oversampling alone buys only four bits.
Step 2: shape the noise
Now the real move. Put the one-bit quantiser inside a feedback loop with an integrator.
The loop compares the input with the fed-back output of the quantiser and integrates the difference. Because the loop has huge gain at low frequencies (an integrator's gain rises as frequency falls, Chapter 2.5), it forces the average of the one-bit output to track the input very precisely at low frequencies. The quantisation error, having nowhere else to go, is pushed up to high frequencies.
For a first-order loop the noise density rises as f^2 in the band; for second order as f^4. The in-band noise falls dramatically:
\text{SNR}_{dB} \approx 6.02n + 1.76 + (2L+1)\cdot10\log_{10}(\text{OSR}) - 10\log_{10}\frac{\pi^{2L}}{2L+1}
where L is the loop order. For a second-order modulator with 64× oversampling and one bit, that gives roughly 80 dB — about 13 bits from a converter that resolves two levels.
Step 3: filter and decimate
A digital low-pass filter removes the high-frequency noise the loop pushed up there, and then the sample rate is reduced to the final one. The output is a high-resolution, low-rate stream.
Why this architecture won. It needs almost no precision analog components — a comparator and an integrator, both of which can be mediocre — and moves all the accuracy into digital filtering, which is exact and free. Since silicon has become cheap and analog precision has not, this is the right trade, and it has been for thirty years.
The costs. Latency, because the digital filter has a long impulse response — which is why a sigma-delta ADC is unsuitable for a fast control loop. And limited bandwidth, since the oversampling ratio must be high. For audio and instrumentation it is unbeatable; for a fast servo, successive approximation is still the answer.
7. A USB-C headphone dongle, traced end to end
A concrete example that ties the chapter together, and answers a question worth asking: why did phones stop having headphone sockets, and what is in the little adapter?
The phone sends digital audio over USB. Inside the dongle:
- A USB audio interface receives the packets and recovers a clock.
- A sigma-delta DAC converts the 16- or 24-bit stream, typically with 128× oversampling, to a one-bit high-rate stream and then to an analog voltage.
- A reconstruction filter — a gentle analog low-pass — removes the leftover high-frequency shaped noise. Gentle is enough, because oversampling pushed the noise far above the audio band.
- A headphone amplifier, essentially a power op-amp from Chapter 2.5, drives the 16 to 32 Ω load. Headphones need current, and a DAC output cannot supply it, which is the same buffering problem as the emitter follower in Chapter 2.3.
Why the phone gave up the socket. A 3.5 mm jack needs 3.5 mm of thickness and a hole through a waterproof case, and the analog amplifier has to live inside the phone next to the noisiest digital circuitry on Earth. Moving it into the cable puts the sensitive analog electronics a few centimetres away from the radio transmitters and the processor. The dongle is not a compromise; the analog performance is usually better outside the phone than inside it.
This is also why an expensive dongle can genuinely sound better than a cheap one — you are buying a better DAC, a lower-jitter clock and a stronger amplifier, all of which are measurable.
Everything in Part 3 has been logic built from fixed circuits. The next chapter looks at the two ways that logic is actually deployed today: a processor that runs software, and a chip whose logic itself is configured after manufacture.
Every formula above, built from scratch
None of the results in this chapter are worth memorising, because each one can be rebuilt in under a minute from something simpler. What follows is that rebuilding, one result at a time, so the formula and the reason for it sit on the same page as the explanation that needed them.
Conversion
\text{LSB} = \frac{V_{FS}}{2^n}, \qquad \text{levels} = 2^n
e_{rms} = \frac{\text{LSB}}{\sqrt{12}}
Where \sqrt{12} comes from: the error is uniformly distributed over one LSB, and a uniform distribution of width w has variance w^2/12.
\text{SNR}_{dB} = 6.02n+1.76
Derivation: a full-scale sine has rms V_{FS}/(2\sqrt2). Divide by e_{rms}:
\frac{V_{FS}/(2\sqrt2)}{V_{FS}/(2^n\sqrt{12})} = \frac{2^n\sqrt{12}}{2\sqrt2}=2^n\sqrt{1.5}
In decibels: 20\log_{10}(2^n)+20\log_{10}(1.2247) = 6.02n+1.76.
\text{ENOB} = \frac{\text{SINAD}_{dB}-1.76}{6.02}
R-2R ladder
V_{out}=V_{ref}\sum_{i=0}^{n-1}\frac{b_i}{2^{n-i}}
Each rung sees the same impedance looking onward, so each bit's contribution is exactly half of the one above.
Sampling and aliasing
f_s \gt 2f_{max}, \qquad f_{alias}=|f_{signal}-k f_s|
Aperture jitter
\Delta V = 2\pi fA\,\Delta t \;\Rightarrow\; t_{jitter} \lt \frac{1}{2\pi f\,2^n}
Derivation: the steepest slope of A\sin(2\pi ft) is 2\pi fA; a timing error \Delta t therefore becomes an amplitude error of that slope times \Delta t. Requiring the error to stay below half an LSB gives the bound.
Successive approximation
n clock cycles for n bits — a binary search, so \log_2 of the number of levels.
Sigma-delta
Oversampling ratio gain:
\Delta\text{SNR} = 10\log_{10}(\text{OSR})\ \text{dB}
With L-th order noise shaping:
\text{SNR}_{dB} \approx 6.02n+1.76+(2L+1)10\log_{10}(\text{OSR})-10\log_{10}\frac{\pi^{2L}}{2L+1}
Reading it: the first two terms are the raw quantiser. The third is the oversampling and shaping gain, and note the factor (2L+1) — a second-order loop gains five times as much per decade of oversampling as no shaping at all. The last term is the penalty the shaping filter's own gain imposes.